### [多路相同模块采用设计复用](https://www.zkp.cc/iccourse/2299.3.html) **Published:** 2025-07-16T10:46:01 **Author:** 智行者IC社区 **Excerpt:** 1.多路相同模块采用设计复用 电源输入输出链路铺铜、走线加粗 注意泄放阻容器件靠近连接器处放置,保证前后地的隔离,通道大于2mm 灯脚尽量摆一排or一列,放置美观 5.无源晶振处,电源输入铺铜打孔处理 插装器件与周围表贴器件距离尽量调开一点 1.多路相同模块采用设计复用 电源输入输出链路铺铜、走线加粗 注意泄放阻容器件靠近连接器处放置,保证前后地的隔离,通道大于2mm 灯脚尽量摆一排or一列,放置美观 5.无源晶振处,电源输入铺铜打孔处理 插装器件与周围表贴器件距离尽量调开一点保持3mm(120mil) 注意原理图标识 7.四层板阻抗控制90Ω,(板厚1.6mm)可以用立创阻抗计算神器计算叠层尺寸方案 ![image1.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image1.png) ![image10.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image10.png) ![image2.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image2.png) ![image3.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image3.png) ![image4.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image4.png) ![image5.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image5.webp) ![image6.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image6.png) ![image7.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image7.png) ![image8.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image8.png) ![image9.png](https://xiaoxi.2632.net/wp-content/uploads/2025/07/image9.webp) **Categories:** Cadence SPB OrCAD Allegro ---